For various semiconductor devices, such as radio frequency (“RF”) switches in bulk silicon or semiconductor on insulator (“SOI”) structures, power loss and switching speed are two important parameters related to device performance. Power loss is determined, in part, by an on-state resistance (Ron) of the semiconductor device, while switching speed is determined, in part, by an off-state capacitance (Coff) of the semiconductor device. The on-state resistance includes the drain-to-source resistance of the semiconductor device in an on state, which partially depends on the resistance of the drain and source metals (e.g., source and drain electrodes) and the device layout area. The off-state capacitance includes the drain-to-source capacitance of the semiconductor device in an off state, which may be attributed to an off-state parasitic coupling between the drain and source metals.
It is desirable for a semiconductor device, such as an RF switch, to have a low on-state resistance to reduce power loss, and a low off-state capacitance to improve switching speed. However, there is a trade-off between the two parameters. For example, the on-state resistance can be reduced by increasing the width of the source and drain metals, but the off-state capacitance can also be adversely increased due to the greater metalization width and device layout area.
Accordingly, there is a need to provide a semiconductor device, such as an RF switch, with a reduced drain-to-source capacitance without substantially compromising the on-state resistance of the semiconductor device.